HIP datasheet, HIP pdf, HIP data sheet, datasheet, data sheet, pdf , Intersil, Driver, Full Bridge FET, No Charge Pump. HIP 80V/A Peak Current Full Bridge Fet Driver. The is a medium frequency, medium voltage H-Bridge N-Channel MOSFET driver IC, available in HIP Data Sheet. FN CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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A High-side Source connection. Metric dimensions, the inch dimensions control. Intersil products are sold by description only. Logic level input that controls AHO driver Pin B High-side Bootstrap supply. Positive supply to control logic and lower gate drivers. Terminal numbers are shown for reference only.
Bootstrap Capacitor when Pulled Low. C with Rise and Fall. No license is granted by implication or otherwise under any patent or dtaasheet rights of Intersil or its subsidiaries.
Copyright Harris Corporation Supply Voltage, V DD. Low Level Input Current. E and e A are measured with the leads constrained to be perpendic. DIS – Lower Outputs. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result. High Level Output Voltage. If it is not present, a visual.
HIP Datasheet(PDF) – Intersil Corporation
Times of Typically 15ns. X signifies that input can be either a “1” or “0”. Logic level input that controls ALO driver Pin All drivers turn-off with no adjustable delay, so the DEL resistor guarantees no shoot-through by delaying the turn-on.
External bootstrap diode and capacitor are required. B High-side Source connection. Mold flash or protrusions shall not exceed 0.
80 V/1.25 A Peak Current Full Bridge FET Driver
DIS – Upper Outputs. Dimension “E” does not include interlead flash or protrusions. Upper Turn-off Propagation Delay. Dimension “D” does not include mold flash, protrusions or gate. Intersil Pb-free products employ special Pb-free material.
If AHI Pin 7 is driven high or not connected. Drives pF Load in Free Air at 50? Logic level input that controls BLO driver Pin Mold flash, protrusion and gate burrs shall not exceed.
Accordingly, the reader is cautioned to verify that data sheets are hop4082 before placing orders. Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. Intersil Corporation’s quality certifications can be viewed at www. The pin can be driven by signal levels of 0V to. Information furnished by Intersil is believed to be accurate and.
A High-side Bootstrap supply. Low Level Output Voltage.
The pin can be driven by signal levels of 0V to 15V no greater than. High Level Input Voltage.
HIP Datasheet pdf – Driver, Full Bridge FET, No Charge Pump – Intersil
Logic level input that controls BHO driver Pin B1 maximum dimensions do not include dambar protrusions. These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Voltage on V SS.
De-couple this pin to V SS Pin 6. The chamfer on the body is optional. Similar to the HIP, it has a flexible input protocol for. Logic level input that when taken high sets all four outputs low. HIP’s reduced drive current allows smaller packaging.